TY - JOUR
T1 - Impact of line edge roughness on ReRAM uniformity and scaling
AU - Constantoudis, Vassilios
AU - Papavieros, George
AU - Karakolis, Panagiotis
AU - Khiat, Ali
AU - Prodromakis, Themistoklis
AU - Dimitrakis, Panagiotis
N1 - Funding Information:
For this research, V.C., G.P., and P.D. have received funding from the EMPIR programme "3DNano" co-financed by the Participating States and from the European Union's Horizon 2020 research and innovation programme. P.K. and P.D. gratefully acknowledge the financial support from the Greece-Russia bilateral joint research project MEM-Q (proj. no./MIS T4DPW-00030/5021467) and research project RADAR (proj. no./MIS T1EDK-00329/5032784) supported by GSRT and funded by National and European funds. Finally, the authors A.K. and T.P. wish to acknowledge the financial support of the Engineering and Physical Sciences Research Council (EPSRC) grants EP/K017829/1, EP/R024642/1.
Funding Information:
Funding: For this research, V.C., G.P., and P.D. have received funding from the EMPIR programme “3DNano” co-financed by the Participating States and from the European Union’s Horizon 2020 research and innovation programme. P.K. and P.D. gratefully acknowledge the financial support from the Greece–Russia bilateral joint research project MEM-Q (proj.no./MIS T4∆PΩ-00030/5021467) and research project RADAR (proj.no./MIS T1E∆K-00329/5032784)) supported by GSRT and funded by National and European funds. Finally, the authors A.K. and T.P. wish to acknowledge the financial support of the Engineering and Physical Sciences Research Council (EPSRC) grants EP/K017829/1, EP/R024642/1.
Publisher Copyright:
© 2019 by the authors. Licensee MDPI, Basel, Switzerland.
PY - 2019/11/30
Y1 - 2019/11/30
N2 - We investigate the effects of Line Edge Roughness (LER) of electrode lines on the uniformity of Resistive Random Access Memory (ReRAM) device areas in cross-point architectures. To this end, a modeling approach is implemented based on the generation of 2D cross-point patterns with predefined and controlled LER and pattern parameters. The aim is to evaluate the significance of LER in the variability of device areas and their performances and to pinpoint the most critical parameters and conditions. It is found that conventional LER parameters may induce >10% area variability depending on pattern dimensions and cross edge/line correlations. Increased edge correlations in lines such as those that appeared in Double Patterning and Directed Self-assembly Lithography techniques lead to reduced area variability. Finally, a theoretical formula is derived to explain the numerical dependencies of the modeling method.
AB - We investigate the effects of Line Edge Roughness (LER) of electrode lines on the uniformity of Resistive Random Access Memory (ReRAM) device areas in cross-point architectures. To this end, a modeling approach is implemented based on the generation of 2D cross-point patterns with predefined and controlled LER and pattern parameters. The aim is to evaluate the significance of LER in the variability of device areas and their performances and to pinpoint the most critical parameters and conditions. It is found that conventional LER parameters may induce >10% area variability depending on pattern dimensions and cross edge/line correlations. Increased edge correlations in lines such as those that appeared in Double Patterning and Directed Self-assembly Lithography techniques lead to reduced area variability. Finally, a theoretical formula is derived to explain the numerical dependencies of the modeling method.
KW - Line edge roughness (LER)
KW - Lithography
KW - Modeling
KW - Resistive random access memory (ReRAM)
KW - Uniformity
KW - Variability
UR - http://www.scopus.com/inward/record.url?scp=85076687366&partnerID=8YFLogxK
U2 - 10.3390/ma12233972
DO - 10.3390/ma12233972
M3 - Article
AN - SCOPUS:85076687366
SN - 1996-1944
VL - 12
JO - Materials
JF - Materials
IS - 23
M1 - 3972
ER -