Improving the Lifetime of Non-Volatile Cache by Write Restriction

Sukarn Agarwal, Hemangee K. Kapoor

Research output: Contribution to journalArticlepeer-review

Abstract / Description of output

The attractive features such as low static power and high density exhibited by the Non-Volatile Memory (NVM) technologies makes them a promising candidate in the memory hierarchy, including caches. However, the limited write endurance with the write variations governed by the access patterns and the applied replacement policies reduce the chance of NVMs as a successor of SRAM. These write variations are of concern as they not only breakdown the NVM cells but also reduce the effective lifetime. This paper proposes efficient techniques to mitigate the intra-set write variation to improve the lifetime of the NVM cache. Our first two techniques partition the cache into windows of equal size and distribute the writes uniformly across the cache set by employing the window as write-restricted or read-only. The selection of the window in these techniques is by rotation or with the help of counters. In our third technique, different cache ways are employed as a write-restricted over the period of execution to distribute the writes uniformly. Experimental results using full system simulation show the significant reduction in intra-set write variation along with improvement in the cache lifetime.
Original languageEnglish
Pages (from-to)1297-1312
Number of pages16
JournalIEEE Transactions on Computers
Volume68
Issue number9
Early online date14 Jan 2019
DOIs
Publication statusPublished - 15 Aug 2019

Keywords / Materials (for Non-textual outputs)

  • cache memory
  • non-volatile memory
  • intra-set write variation
  • lifetime
  • partition
  • write restriction
  • throttling

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