Intel MPX Explained: A Cross-layer Analysis of the Intel MPX System Stack

Oleksii Oleksenko, Dmitrii Kuvaiskii, Pramod Bhatotia, Pascal Felber, Christof Fetzer

Research output: Contribution to journalArticlepeer-review


Memory-safety violations are the primary cause of security and reliability issues in software systems written in unsafe languages. Given the limited adoption of decades-long research in software-based memory safety approaches, as an alternative, Intel released Memory Protection Extensions (MPX)Ða hardware-assisted technique to achieve memory safety. In this work, we perform an exhaustive study of Intel MPX architecture along three dimensions: (a) performance overheads, (b) security guarantees, and (c) usability issues. We present the first detailed root cause analysis of problems in the Intel MPX architecture through a cross-layer dissection of the entire system stack, involving the hardware, operating system, compilers, and applications. To put our findings into perspective, we also present an in-depth comparison of Intel MPX with three prominent types of software-based memory safety approaches. Lastly, based on our investigation, we propose directions for potential changes to the Intel MPX architecture to aid the design space exploration of future hardware extensions for memory safety.
Original languageEnglish
Article number28
Pages (from-to)28:1-28:30
Number of pages30
JournalProceedings of the ACM on Measurement and Analysis of Computing Systems
Issue number2
Publication statusPublished - 13 Jun 2018
EventACM SIGMETRICS International Conference on Measurement and Modeling of Computer Systems - Irvine, United States
Duration: 18 Jun 201822 Aug 2018

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