Interframe Bus Encoding Technique and Architecture for MPEG-4 AVC/H.264 Video Compression

Research output: Contribution to journalArticlepeer-review

Abstract

In this paper, we propose an implementation of a data encoder to reduce the switched capacitance on a system bus. Our technique focuses on transferring raw video data for multiple reference frames between off-and on-chip memories in an MPEG-4 AVC/H.264 encoder. This technique is based on entropy coding to minimize bus transition. Existing techniques exploit the correlation between neighboring pixels. In our proposed technique, we exploit pixel correlation between two consecutive frames. Our method achieves a 58% power saving compared to an unencoded bus when transferring pixels on a 32-b off-chip bus with a 15-pF capacitance per wire.

Original languageEnglish
Pages (from-to)831-835
Number of pages5
JournalIEEE Transactions on Very Large Scale Integration (VLSI) Systems
Volume18
Issue number5
DOIs
Publication statusPublished - 1 May 2010

Fingerprint

Dive into the research topics of 'Interframe Bus Encoding Technique and Architecture for MPEG-4 AVC/H.264 Video Compression'. Together they form a unique fingerprint.

Cite this