Leeway: Addressing Variability in Dead-Block Prediction for Last-Level Caches

Priyank Faldu, Boris Grot

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract / Description of output

The looming breakdown of Moore’s Law and the end of voltage scaling are ushering a new era where neither transistors nor the energy to operate them is free. This calls for a new regime in computer systems, one in which every transistor counts. Caches are essential for processor performance and represent the bulk of modern processor’s transistor budget. To get more performance out of the cache hierarchy, future processors will rely on effective cache management policies. This paper identifies variability in generational behavior of cache blocks as a key challenge for cache management policies that aim to identify dead blocks as early and as accurately as possible to maximize cache efficiency. We show that existing management policies are limited by the metrics they use to identify dead blocks, leading to low coverage and/or low accuracy in the face of variability. In response, we introduce a new metric – Live Distance – that uses the stack distance to learn the temporal reuse characteristics of cache blocks, thus enabling a dead block predictor that is robust to variability in generational behavior. Based on the reuse characteristics of an application’s cache blocks, our predictor – Leeway – classifies application’s behavior as streaming-oriented or reuse-oriented and dynamically selects an appropriate cache management policy. By leveraging live distance for LLC management, leeway outperforms state-of-the-art approaches on single- and multi-core SPEC and manycore CloudSuite workloads.
Original languageEnglish
Title of host publication2017 26th International Conference on Parallel Architectures and Compilation Techniques (PACT)
Pages180-193
Number of pages14
ISBN (Electronic)978-1-5090-6764-0
DOIs
Publication statusPublished - 2 Nov 2017
Event26th International Conference on Parallel Architectures and Compilation Techniques - Portland, United States
Duration: 9 Sept 201713 Sept 2017
https://parasol.tamu.edu/pact17/

Conference

Conference26th International Conference on Parallel Architectures and Compilation Techniques
Abbreviated titlePACT 2017
Country/TerritoryUnited States
CityPortland
Period9/09/1713/09/17
Internet address

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