TY - GEN
T1 - Low light signal detection using a high dynamic range, high responsivity image sensor with multiple sampling modes
AU - Golding, Robert
AU - Raynor, Jeffrey M.
AU - Henderson, Robert K.
PY - 2012/12/1
Y1 - 2012/12/1
N2 - This paper presents a high dynamic range imaging sensor for detection of low light level signals. The sensor utilises a 12x12 array of large 150μm x 150μm pixels. The readout circuitry allows for multiple readout options including; multiple sampling (which allows for techniques such as Correlated Double Sampling (CDS)) and Time to Digital Conversion (TDC) techniques, operated both independently and under the same integration period. Scope for test patterns is also present in the design. All samples taken from the pixels before during and after exposure are converted digitally through the use of a single slope ADC utilising a 10 bit DAC and a comparator. No sample and hold capacitor is present. 4x10 bit SRAMs (Static Random Access Memory) per pixel are utilised to record multiple samples, or act as a counter for the TDC mode of operation. The large dynamic range of the system is attributable to both the novel timing system implemented within the multiple sampling mode of operation and the TDC mode of operation (operated independently or intermittently within the same integration time), which combines the use of 4x10 bit SRAMs with the 10 bit DAC to produce a counter capable of monitoring the pixel signal over extremely long integration times; in this case up to 30 seconds.
AB - This paper presents a high dynamic range imaging sensor for detection of low light level signals. The sensor utilises a 12x12 array of large 150μm x 150μm pixels. The readout circuitry allows for multiple readout options including; multiple sampling (which allows for techniques such as Correlated Double Sampling (CDS)) and Time to Digital Conversion (TDC) techniques, operated both independently and under the same integration period. Scope for test patterns is also present in the design. All samples taken from the pixels before during and after exposure are converted digitally through the use of a single slope ADC utilising a 10 bit DAC and a comparator. No sample and hold capacitor is present. 4x10 bit SRAMs (Static Random Access Memory) per pixel are utilised to record multiple samples, or act as a counter for the TDC mode of operation. The large dynamic range of the system is attributable to both the novel timing system implemented within the multiple sampling mode of operation and the TDC mode of operation (operated independently or intermittently within the same integration time), which combines the use of 4x10 bit SRAMs with the 10 bit DAC to produce a counter capable of monitoring the pixel signal over extremely long integration times; in this case up to 30 seconds.
UR - http://www.scopus.com/inward/record.url?scp=84877908047&partnerID=8YFLogxK
U2 - 10.1117/12.980464
DO - 10.1117/12.980464
M3 - Conference contribution
AN - SCOPUS:84877908047
SN - 9780819493019
T3 - Proceedings of SPIE - The International Society for Optical Engineering
BT - Optical Systems Design 2012
T2 - Optical Systems Design 2012
Y2 - 26 November 2012 through 29 November 2012
ER -