Abstract / Description of output
The paper describes hardware solutions for the IEEE 802.11 MAC (Medium Access Control) layer and IEEE 802.11a digital baseband in an RF-MIMO WLAN transceiver that performs the signal combining in the analogue domain. Architecture and implementation details of the MAC processor including a hardware accelerator and a 16-bit MAC-PHY interface are presented. The proposed hardware solution is tested and verified using a PHY link emulator. Architecture, design, implementation, and test of a reconfigurable digital baseband processor are described too. Description includes the baseband algorithms (the main blocks being MIMO channel estimation and Tx-Rx analog beamforming), their FPGA-based implementation, baseband printed-circuit-board, and real-time tests.
Original language | English |
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Title of host publication | Proceedings of Papers - 5th European Conference on Circuits and Systems for Communications, ECCSC'10 |
Pages | 26-33 |
Number of pages | 8 |
Publication status | Published - 1 Dec 2010 |
Event | 5th European Conference on Circuits and Systems for Communications, ECCSC'10 - Belgrade, Serbia Duration: 23 Nov 2010 → 25 Nov 2010 |
Conference
Conference | 5th European Conference on Circuits and Systems for Communications, ECCSC'10 |
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Country/Territory | Serbia |
City | Belgrade |
Period | 23/11/10 → 25/11/10 |
Keywords / Materials (for Non-textual outputs)
- Baseband
- MAC
- MIMO
- Processor