TY - JOUR
T1 - Mapping application performance to HPC architecture
AU - Gray, Alan
AU - Bethune, Iain
AU - Kenway, Richard
AU - Smith, Lorna
AU - Kitchen, Christine
AU - Guest, Martin
AU - Calleja, Paul
AU - Korzynski, Aleksander
AU - Rankin, Stuart
AU - Ashworth, Mike
AU - Porter, Andrew
AU - Todorov, Illian
AU - Plummer, Martin
AU - Jones, Emma
AU - Steenman-Clark, Lois
AU - Ralston, Ben
AU - Laughton, Charles
PY - 2012/3
Y1 - 2012/3
N2 - A suite of application benchmarks, designed to be broadly representative of UK HPC usage, has been developed to stress a broad range of architectural features of large scale parallel HPC resources. A generic methodology to investigate application performance and scaling characteristics has been defined, resulting in a detailed understanding of the performance of these applications. This methodology is transferable to other applications and systems: it is of practical value to developers and users who are aiming for optimal utilisation of HPC resources. An understanding of the performance characteristics of a range of large-scale HPC resources has been obtained using low-level synthetic benchmarks. A relatively simple, qualitative mechanism to assess and predict application performance on current and future architectures using synthetic benchmark results together with application performance analysis results is explored.
AB - A suite of application benchmarks, designed to be broadly representative of UK HPC usage, has been developed to stress a broad range of architectural features of large scale parallel HPC resources. A generic methodology to investigate application performance and scaling characteristics has been defined, resulting in a detailed understanding of the performance of these applications. This methodology is transferable to other applications and systems: it is of practical value to developers and users who are aiming for optimal utilisation of HPC resources. An understanding of the performance characteristics of a range of large-scale HPC resources has been obtained using low-level synthetic benchmarks. A relatively simple, qualitative mechanism to assess and predict application performance on current and future architectures using synthetic benchmark results together with application performance analysis results is explored.
KW - Performance analysis
KW - Benchmarking
KW - High performance computing
UR - http://www.scopus.com/inward/record.url?scp=84855427078&partnerID=8YFLogxK
U2 - 10.1016/j.cpc.2011.11.013
DO - 10.1016/j.cpc.2011.11.013
M3 - Article
SN - 0010-4655
VL - 183
SP - 520
EP - 529
JO - Computer Physics Communications
JF - Computer Physics Communications
IS - 3
ER -