With the recent advances of the emerging memories technologies, research are able to implement novel circuits, systems and computer architectures towards the design of high-performance and low-power electronic systems able to accelerate and/or optimize the functionality of many computer workflows. One emerging technology, the ReRAM/memristor is gathering attention due to its inherent advantages for logic and memory computing systems. At the same time, CMOS circuit design seems to have reached a limit, where easily optimized circuit solutions cannot be found. Thus, further research towards novel logic gate families, such as Threshold Logic Gates (TLGs), a logic family known for its high-speed and low power consumption, is needed. Although many implementation concepts of TLG circuit are using memristors, few of these implementations are based on physical ReRAM devices. In this work we are proposing a memristor-based threshold logic gate design towards the optimization of computer workflows. The presented results include a physical implementation of the proposed circuits which supports the concept of memory-based reconfigurable computing circuits and systems.