TY - GEN
T1 - Metal Oxide-enabled Reconfigurable Memristive Threshold Logic Gates
AU - Papandroulidakis, G.
AU - Khiat, A.
AU - Serb, A.
AU - Stathopoulos, S.
AU - Michalas, L.
AU - Prodromakis, T.
N1 - Funding Information:
This work has been supported by the Engineering and Physical Sciences Research Council (EPSRC) grants EP/K017829/1. XXX-X-XXXX-XXXX-X/XX/$XX.00 ©20XX IEEE
Publisher Copyright:
© 2018 IEEE.
PY - 2018/5/4
Y1 - 2018/5/4
N2 - With the recent advances of the emerging memories technologies, research are able to implement novel circuits, systems and computer architectures towards the design of high-performance and low-power electronic systems able to accelerate and/or optimize the functionality of many computer workflows. One emerging technology, the ReRAM/memristor is gathering attention due to its inherent advantages for logic and memory computing systems. At the same time, CMOS circuit design seems to have reached a limit, where easily optimized circuit solutions cannot be found. Thus, further research towards novel logic gate families, such as Threshold Logic Gates (TLGs), a logic family known for its high-speed and low power consumption, is needed. Although many implementation concepts of TLG circuit are using memristors, few of these implementations are based on physical ReRAM devices. In this work we are proposing a memristor-based threshold logic gate design towards the optimization of computer workflows. The presented results include a physical implementation of the proposed circuits which supports the concept of memory-based reconfigurable computing circuits and systems.
AB - With the recent advances of the emerging memories technologies, research are able to implement novel circuits, systems and computer architectures towards the design of high-performance and low-power electronic systems able to accelerate and/or optimize the functionality of many computer workflows. One emerging technology, the ReRAM/memristor is gathering attention due to its inherent advantages for logic and memory computing systems. At the same time, CMOS circuit design seems to have reached a limit, where easily optimized circuit solutions cannot be found. Thus, further research towards novel logic gate families, such as Threshold Logic Gates (TLGs), a logic family known for its high-speed and low power consumption, is needed. Although many implementation concepts of TLG circuit are using memristors, few of these implementations are based on physical ReRAM devices. In this work we are proposing a memristor-based threshold logic gate design towards the optimization of computer workflows. The presented results include a physical implementation of the proposed circuits which supports the concept of memory-based reconfigurable computing circuits and systems.
KW - artificial neural networks
KW - Current-Mode
KW - memristive neural networks
KW - memristor
KW - reconfigurable
KW - ReRAM
KW - synaptic weight
KW - Threshold Logic Gates
UR - https://www.scopus.com/pages/publications/85057113246
U2 - 10.1109/ISCAS.2018.8351192
DO - 10.1109/ISCAS.2018.8351192
M3 - Conference contribution
AN - SCOPUS:85057113246
T3 - Proceedings - IEEE International Symposium on Circuits and Systems
BT - 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings
PB - Institute of Electrical and Electronics Engineers
T2 - 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018
Y2 - 27 May 2018 through 30 May 2018
ER -