Modeling of MMCs With Controlled DC-Side Fault Blocking Capability for DC Protection Studies

The fault current characteristics in dc systems depend largely on the response, and hence also the topology, of the ac-dc converters. The presently used ac-dc converter topologies may be categorized into those with controlled or uncontrolled fault blocking capability and those lacking such capability. For the topologies of the former category, generic models of the dc-side fault response have not yet been developed and a characterization of the influence of control and sensor delays is a notable omission. Therefore, to support accurate and comprehensive dc system protection studies, this paper presents three reduced converter models and analyzes the impact of key parameters on the dc-side fault response. The models retain accurate representation of the dc-side current control, but differ in representation of the ac-side and internal current control dynamics, and arm voltage limits. The models were verified against a detailed (full-switched) simulation model for the cases of a full-bridge and a hybrid modular multilevel converter, and validated against experimental data from a lab-scale prototype. The models behave similarly in the absence of arm voltage limits, but only the most detailed of the three retains a high degree of accuracy when these limits are reached.