Abstract
Application requirements for embedded systems are growing rapidly, as is the complexity of systems designed to execute them. A common abstraction used to tame this growing complexity is that of a mapping, which assigns parts of an application to different hardware resources. Modern flows need to explore an intractably large design space of mappings, and be able to quickly find near-optimal mappings for different objectives, sometimes at runtime. With systems featuring thousands of cores in the near horizon, we need methods to make this exploration step truly scalable. In this paper we argue that the mathematical representation of a mapping is central to achieve this. We present different representations and how these could be applied to different contexts and objectives, like complex design-space exploration meta-heuristics or efficient runtime systems.
| Original language | English |
|---|---|
| Title of host publication | 2018 IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC) |
| Publisher | Institute of Electrical and Electronics Engineers |
| Pages | 184-191 |
| Number of pages | 8 |
| ISBN (Electronic) | 978-1-5386-6689-0 |
| ISBN (Print) | 978-1-5386-6690-6 |
| DOIs | |
| Publication status | Published - 19 Nov 2018 |
| Event | IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-2018) - Hanoi, Viet Nam Duration: 12 Sept 2018 → 14 Sept 2018 Conference number: 12 https://mcsoc-forum.org/2018/ |
Conference
| Conference | IEEE 12th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-2018) |
|---|---|
| Abbreviated title | MCSoC 2018 |
| Country/Territory | Viet Nam |
| City | Hanoi |
| Period | 12/09/18 → 14/09/18 |
| Internet address |