Abstract
Siroyan develops and licenses DSP cores and related software development tools. Its first architecture, the OneDSP, disclosed in October 2001, is a unifying digital signal processor architecture designed from scratch for the high performance and flexibility demanded by next generation System-on-a-Chip (SoC) designs. Its configurable, clustered VLIW architecture optimizes hardware resources to exploit the instruction level parallelism (ILP) that exists in DSP applications. The industrial-strength tool-chain ease porting application and SoC integration. Using a parallel FFT algorithm as an example, we demonstrate that the performance of OneDSP can scale linearly with increasing number of clusters. Benchmark figures are included to show the highly competitive performance of the architecture.
Original language | English |
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Title of host publication | Acoustics, Speech, and Signal Processing (ICASSP), 2002 IEEE International Conference on |
Pages | IV-3792-IV-3795 |
Number of pages | 4 |
Volume | 4 |
DOIs | |
Publication status | Published - 1 May 2002 |
Keywords
- Digital signal processing
- VLIW