Optimized buffer allocation in multicore platforms

Maximilian Odendahl; Andres Goens; Rainer Leupers; Gerd Ascheid; Benjamin Ries; Berthold Vocking; Tomas Henriksson

doi:10.7873/DATE.2014.337

Optimized buffer allocation in multicore platforms

Maximilian Odendahl, Andres Goens, Rainer Leupers, Gerd Ascheid, Benjamin Ries, Berthold Vocking, Tomas Henriksson

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

With the availability of advanced MPSoC and emerging Dynamic RAM (DRAM) interface technologies, an optimal allocation of logical data buffers to physical memory cannot be handled manually anymore due to the huge design space. An allocation does not only need to decide between an on-or off-chip memory, but also needs to take an increasing number of available memory channels, different bandwidth capacities and several routing possibilities into account. We formalize this problem and introduce a Mixed Integer Linear Programming (MILP) model based on two different optimization criteria. We implement the MILP model into a retargetable tool and present a case study with representative data of the Long-Term-Evolution (LTE) standard to show the real-life applicability of our approach.

Original language	English
Title of host publication	2014 Design, Automation Test in Europe Conference Exhibition (DATE)
Publisher	Institute of Electrical and Electronics Engineers
Pages	1-6
Number of pages	6
ISBN (Print)	978-3-9815370-2-4
DOIs	https://doi.org/10.7873/DATE.2014.337
Publication status	Published - 21 Apr 2014
Event	Design, Automation & Test in Europe (DATE) - Dresden, Germany Duration: 24 Mar 2014 → 28 Mar 2014 https://past.date-conference.com/date14/

Conference

Conference	Design, Automation & Test in Europe (DATE)
Abbreviated title	DATE 2014
Country/Territory	Germany
City	Dresden
Period	24/03/14 → 28/03/14
Internet address	https://past.date-conference.com/date14/

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https://ieeexplore.ieee.org/abstract/document/6800538Licence: All Rights Reserved

Cite this

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title = "Optimized buffer allocation in multicore platforms",

abstract = "With the availability of advanced MPSoC and emerging Dynamic RAM (DRAM) interface technologies, an optimal allocation of logical data buffers to physical memory cannot be handled manually anymore due to the huge design space. An allocation does not only need to decide between an on-or off-chip memory, but also needs to take an increasing number of available memory channels, different bandwidth capacities and several routing possibilities into account. We formalize this problem and introduce a Mixed Integer Linear Programming (MILP) model based on two different optimization criteria. We implement the MILP model into a retargetable tool and present a case study with representative data of the Long-Term-Evolution (LTE) standard to show the real-life applicability of our approach.",

author = "Maximilian Odendahl and Andres Goens and Rainer Leupers and Gerd Ascheid and Benjamin Ries and Berthold Vocking and Tomas Henriksson",

year = "2014",

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doi = "10.7873/DATE.2014.337",

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Odendahl, M, Goens, A, Leupers, R, Ascheid, G, Ries, B, Vocking, B & Henriksson, T 2014, Optimized buffer allocation in multicore platforms. in 2014 Design, Automation Test in Europe Conference Exhibition (DATE). Institute of Electrical and Electronics Engineers, pp. 1-6, Design, Automation & Test in Europe (DATE), Dresden, Saxony, Germany, 24/03/14. https://doi.org/10.7873/DATE.2014.337

TY - GEN

T1 - Optimized buffer allocation in multicore platforms

AU - Odendahl, Maximilian

AU - Goens, Andres

AU - Leupers, Rainer

AU - Ascheid, Gerd

AU - Ries, Benjamin

AU - Vocking, Berthold

AU - Henriksson, Tomas

PY - 2014/4/21

Y1 - 2014/4/21

N2 - With the availability of advanced MPSoC and emerging Dynamic RAM (DRAM) interface technologies, an optimal allocation of logical data buffers to physical memory cannot be handled manually anymore due to the huge design space. An allocation does not only need to decide between an on-or off-chip memory, but also needs to take an increasing number of available memory channels, different bandwidth capacities and several routing possibilities into account. We formalize this problem and introduce a Mixed Integer Linear Programming (MILP) model based on two different optimization criteria. We implement the MILP model into a retargetable tool and present a case study with representative data of the Long-Term-Evolution (LTE) standard to show the real-life applicability of our approach.

AB - With the availability of advanced MPSoC and emerging Dynamic RAM (DRAM) interface technologies, an optimal allocation of logical data buffers to physical memory cannot be handled manually anymore due to the huge design space. An allocation does not only need to decide between an on-or off-chip memory, but also needs to take an increasing number of available memory channels, different bandwidth capacities and several routing possibilities into account. We formalize this problem and introduce a Mixed Integer Linear Programming (MILP) model based on two different optimization criteria. We implement the MILP model into a retargetable tool and present a case study with representative data of the Long-Term-Evolution (LTE) standard to show the real-life applicability of our approach.

U2 - 10.7873/DATE.2014.337

DO - 10.7873/DATE.2014.337

M3 - Conference contribution

SN - 978-3-9815370-2-4

SP - 1

EP - 6

BT - 2014 Design, Automation Test in Europe Conference Exhibition (DATE)

PB - Institute of Electrical and Electronics Engineers

T2 - Design, Automation & Test in Europe (DATE)

Y2 - 24 March 2014 through 28 March 2014

ER -

Optimized buffer allocation in multicore platforms

Abstract

Conference

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