Abstract / Description of output
Network processors today consist of multiple parallel processors (micro engines) with support for multiple threads to exploit packet level parallelism inherent in network workloads. With such concurrency, packet ordering at the output of the network processor cannot be guaranteed. This paper studies the effect of concurrency in network processors on packet ordering. We use a validated Petri net model of a commercial network processor, Intel IXP 2400, to determine the extent of packet reordering for IPv4 forwarding application. Our study indicates that in addition to the parallel processing in the network processor, the allocation scheme for the transmit buffer also adversely impacts packet ordering. In particular, our results reveal that these packet reordering results in a packet retransmission rate of up to 61%. We explore different transmit buffer allocation schemes namely, contiguous, strided, local, and global which reduces the packet retransmission to 24%. We propose an alternative scheme, packet sort, which guarantees complete packet ordering while achieving a throughput of 2.5 Gbps. Further, packet sort outperforms the in-built packet ordering schemes in the IXP processor by up to 35%.
Original language | English |
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Title of host publication | Parallel and Distributed Processing Symposium, 2007. IPDPS 2007. IEEE International |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 1-10 |
Number of pages | 10 |
ISBN (Print) | 1-4244-0910-1 |
DOIs | |
Publication status | Published - 1 Mar 2007 |
Keywords / Materials (for Non-textual outputs)
- IP networks
- Internet
- Petri nets
- buffer storage
- multi-threading
- network-on-chip
- storage allocation
- telecommunication traffic
- IPv4 forwarding application
- Petri net
- buffer allocation
- multiple parallel processor
- multiple thread
- network processor
- packet level parallelism
- packet reordering
- packet sort
- Computer science
- Computer science education
- Concurrent computing
- Design automation
- Educational technology
- Parallel processing
- Random access memory
- Supercomputers
- Throughput
- Yarn