Partitioned schedules for clustered VLIW architectures

M.M. Fernandes, J. Llosa, N. Topham

Research output: Chapter in Book/Report/Conference proceedingConference contribution


This paper presents results on a new approach to partitioning a modulo-scheduled loop for distributed execution on parallel clusters of functional units organized as a VLIW machine. A distinctive characteristic of this architecture is the use of register files organized by means of queues, which results in a number of advantages over conventional schemes, but also requires the development of specific compiling and hardware features. We have investigated a scheme based on copy operations to deal with data values to be consumed more than once during loop execution. Experiments with loop unrolling were also performed in order to optimize both loop execution and the use of machine resources. A partitioning algorithm has been implemented to perform some experiments with the clustered architecture model, an organization widely accepted as being essential for very wide issue machines
Original languageEnglish
Title of host publicationParallel Processing Symposium, 1998. IPPS/SPDP 1998. Proceedings of the First Merged International ... and Symposium on Parallel and Distributed Processing 1998
Number of pages6
Publication statusPublished - 1 Mar 1998


  • parallel architectures
  • parallel machines
  • pipeline processing
  • program control structures
  • scheduling
  • clustered VLIW architectures
  • clustered architecture model
  • compilers
  • copy operations
  • data values
  • experiments
  • loop execution
  • loop unrolling
  • modulo-scheduled loop
  • parallel clusters
  • partitioned schedules
  • queues
  • register files
  • software pipelining
  • Computer architecture
  • Computer science
  • Concurrent computing
  • Hardware
  • Parallel processing
  • Pipeline processing
  • Processor scheduling
  • Registers
  • Software algorithms
  • VLIW

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