@inproceedings{e4545b0ac59249818dd1f2c5787c647a,
title = "POLSCA: Polyhedral high-level synthesis with compiler transformations",
abstract = "Polyhedral optimization can parallelize nested affine loops for high-level synthesis (HLS), but polyhedral tools are HLS-agnostic and can worsen performance. Moreover, HLS tools require user directives which can produce unreadable polyhedral-transformed code. To address these two challenges, we present POLSCA, a compiler framework that improves polyhedral HLS workflow by automatic code transformation. POLSCA decomposes a design before polyhedral optimization to balance code complexity and parallelism, while revising memory interfaces of polyhedral-transformed code to make partitioning explicit for HLS tools; it enables designs to benefit more easily from polyhedral optimization. Experiments on Polybench/C show that POLSCA designs are 1.5 times faster on average compared with baseline designs generated directly from applying HLS on C code.",
keywords = "compiler, high-level synthesis, polyhedral model",
author = "Ruizhe Zhao and Jianyi Cheng and Wayne Luk and Constantinides, \{George A.\}",
year = "2023",
month = feb,
day = "13",
doi = "10.1109/FPL57034.2022.00044",
language = "English",
isbn = "9781665473910",
series = "Proceedings of the International Conference on Field-Programmable Logic and Applications",
publisher = "Institute of Electrical and Electronics Engineers",
pages = "235--242",
booktitle = "2022 32nd International Conference on Field-Programmable Logic and Applications",
address = "United States",
note = "32nd International Conference on Field-Programmable Logic and Applications, FPL 2022 ; Conference date: 29-08-2022 Through 02-09-2022",
}