Porting incompressible flow matrix assembly to FPGAs for accelerating HPC engineering simulations

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Engineering is an important domain for supercomputing, with the Alya model being a popular code for undertaking such simulations. With ever increasing demand from users to model larger, more complex systems at reduced time to solution it is important to explore the role that novel hardware technologies, such as FPGAs, can play in accelerating these workloads on future exascale systems.

In this paper we explore the porting of Alya's in-compressible flow matrix assembly kernel, which accounts for a large proportion of the model runtime, onto FPGAs. After describing in detail successful strategies for optimisation at the kernel level, we then explore sharing the workload between the FPGA and host CPU, mapping most appropriate parts of the kernel between these technologies, enabling us to more effectively exploit the FPGA. We then compare the performance of our approach on a Xilinx Alveo U280 against a 24-core Xeon Platinum CPU and Nvidia V100 GPU, with the FPGA significantly out-performing the CPU and performing comparably against the GPU, whilst drawing substantially less power. The result of this work is both an experience report describing appropriate dataflow optimisations which we believe can be applied more widely across HPC codes, and a performance comparison for this specific workload that demonstrates the potential for FPGAs in accelerating HPC engineering simulations.
Original languageEnglish
Title of host publication2021 IEEE/ACM International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC)
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages9-20
ISBN (Electronic)978-1-6654-4664-8
ISBN (Print)978-1-6654-3071-5
DOIs
Publication statusPublished - 20 Dec 2021
EventSeventh International Workshop on Heterogeneous High-performance Reconfigurable Computing - St. Louis, United States
Duration: 15 Nov 202115 Nov 2021
https://h2rc.cse.sc.edu/

Workshop

WorkshopSeventh International Workshop on Heterogeneous High-performance Reconfigurable Computing
Abbreviated titleH2RC21
Country/TerritoryUnited States
CitySt. Louis
Period15/11/2115/11/21
Internet address

Keywords

  • FPGA
  • Xilinx Alveo U280
  • High Level Synthesis
  • Alya
  • engineering simulations
  • incompressible flow

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