Power performance analysis of the iterative-MIMO adaptive switching algorithm detector on the FPGA hardware

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract / Description of output

In this paper, a comprehensive power performance analysis of a novel Adaptive Switching Algorithm for an iterative-MIMO system is investigated with the prime goal of minimizing energy consumption in the receiver. The algorithm works by switching between a high performance detection method, the Fixed Sphere Decoding, and a much lower complexity algorithm, the Vertical-Bell Laboratories Layered Space-Time Zero Forcing technique, controlled by a threshold according to the mutual information calculated during each transmission. Results show significant improvements over current non-adaptive receivers, where energy savings of more than 60% can be obtained using on the latest Xilinx®Virtex- 7 FPGA hardware.

Original languageEnglish
Title of host publicationIEEE Vehicular Technology Conference
PublisherInstitute of Electrical and Electronics Engineers
Volume2015
ISBN (Print)9781479980888
DOIs
Publication statusPublished - 1 Jul 2015
Event81st IEEE Vehicular Technology Conference, VTC Spring 2015 - Glasgow, United Kingdom
Duration: 11 May 201514 May 2015

Conference

Conference81st IEEE Vehicular Technology Conference, VTC Spring 2015
Country/TerritoryUnited Kingdom
CityGlasgow
Period11/05/1514/05/15

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