Prevention slot flow-control mechanism for low latency torus network-on-chip

A. Joshi, P. Venkatesh, M. Mutyam

Research output: Contribution to journalArticlepeer-review

Abstract / Description of output

The challenge for on-chip networks is to provide low latency communication in a very low power budget. To reduce the latency and maintain the simplicity of a mesh topology, torus topology is proposed. As torus topology has an inherent circular dependency, additional effort is needed to prevent deadlock, even if deadlock free routing algorithms are used. The authors propose a novel flow-control mechanism to address cost/performance constraints in torus networks and ensure deadlock freedom. They achieve flow-control by using a prevention mechanism and ensure deadlock freedom while requiring only a single packet buffer per input port. They simplify the router design by having a simple switch allocator that prioritises in-flight packets, and a single packet buffer per input port that eliminates the need for virtual channels. They also propose a mechanism to avoid starvation that can arise because of the prioritised arbitration. Experimental validation reveals that the authors design achieves significant improvement in throughput, as compared with the traditional design, while using significantly fewer buffers.
Original languageEnglish
Pages (from-to)304-316
Number of pages13
JournalIET Computers and Digital Techniques
Volume7
Issue number6
DOIs
Publication statusPublished - 1 Nov 2013

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