One of the enduring problems in introducing computer architecture and assembly language to students is most systems are so complex that the students quickly lose sight of how the subsystems interrelate. To effectively teach how a system processes and executes instructions, most students must program in assembly language and observe how the processor handles the code through execution. Often, the students get lost in the myriad of instructions and registers and lose the basic concepts. This paper introduces a free visual simulation of a very simple 4-bit architecture computer, Programmable Reconfigurable Informational Simple Microcomputer (PRISM), to be used in an introductory digital logic course or the beginning of a computer organization or architecture course. It provides an assembler as well as a colorful block diagram of the overall system-indicating which Register-transfer-logic (RTL) units are being activated and which subsystems are accessed. Additionally, a state diagram graphic can be activated to illustrate the progress through the corresponding state machine as the students advance the clock. An interesting side effect of providing this tool to students was that, although understanding of the signal level workings of the computer increased, the mechanics and comprehension of hand-assembling a program dropped significantly.
|Title of host publication||ASEE Annual Conference and Exposition, Conference Proceedings|
|Publication status||Published - 2010|
|Event||2010 ASEE Annual Conference and Exposition - Louisville, KY, United States|
Duration: 20 Jun 2010 → 23 Jun 2010
|Conference||2010 ASEE Annual Conference and Exposition|
|Period||20/06/10 → 23/06/10|