@inproceedings{7751d54674a1424e80a2569cc005e8f1,
title = "Processing big-data with Memristive Technologies: Splitting the Hyperplane Efficiently",
abstract = "An important cornerstone of data processing is the ability to efficiently capture structure in data. This entails treating the input space as a hyperplane that needs partitioning. We argue that several modern electronic systems can be understood as carrying out such partitionings: from standard logic gates to Artificial Neural Networks (ANNs). More recently, memristive technologies equipped such systems with the benefit of continuous tuneability directly in hardware, thus rendering these reconfigurable in a power and space efficient manner. Here, we demonstrate several proof-of-concept examples where memristors enable circuits optimised to carry out different flavours of the fundamental task of splitting the hyperplane. These include threshold logic and receptive field based classifiers that are presented within the context of a unified perspective.",
keywords = "Artificial Neural Networks, Clusterer, Fuzzy Gate, memristor, Metal Oxide RRAM, Template Pixel, Texel, Threshold Logic Gates",
author = "A. Serb and G. Papandroulidakis and A. Khiat and T. Prodromakis",
note = "Publisher Copyright: {\textcopyright} 2018 IEEE.; 2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 ; Conference date: 27-05-2018 Through 30-05-2018",
year = "2018",
month = may,
day = "4",
doi = "10.1109/ISCAS.2018.8351773",
language = "English",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers",
booktitle = "2018 IEEE International Symposium on Circuits and Systems, ISCAS 2018 - Proceedings",
address = "United States",
}