Processor and method for generating and storing compressed instructions in a program memory and decompressed instructions in an instruction cache wherein the decompressed instructions are assigned imaginary addresses derived from information stored in the program memory with the compressed instructions

Nigel Topham

Processor and method for generating and storing compressed instructions in a program memory and decompressed instructions in an instruction cache wherein the decompressed instructions are assigned imaginary addresses derived from information stored in the program memory with the compressed instructions

Research output: Patent

Original language	English
Patent number	US patent no. 7,124,279
Publication status	Published - 2006

Cite this

@misc{c8883a85dec1403188475a65a08d741f,

title = "Processor and method for generating and storing compressed instructions in a program memory and decompressed instructions in an instruction cache wherein the decompressed instructions are assigned imaginary addresses derived from information stored in the program memory with the compressed instructions",

author = "Nigel Topham",

year = "2006",

language = "English",

type = "Patent",

note = "US patent no. 7,124,279",

}

Processor and method for generating and storing compressed instructions in a program memory and decompressed instructions in an instruction cache wherein the decompressed instructions are assigned imaginary addresses derived from information stored in the program memory with the compressed instructions. / Topham, Nigel (Inventor).
Patent No.: US patent no. 7,124,279.

Research output: Patent

TY - PAT

T1 - Processor and method for generating and storing compressed instructions in a program memory and decompressed instructions in an instruction cache wherein the decompressed instructions are assigned imaginary addresses derived from information stored in the program memory with the compressed instructions

AU - Topham, Nigel

PY - 2006

Y1 - 2006

M3 - Patent

M1 - US patent no. 7,124,279

ER -