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Abstract
We validate a HOL4 model of the ARM Cortex-M0 microcontroller core by testing the model’s behaviour on randomly chosen instructions against a real chip.
The model and our intended application involve precise timing information about instruction execution, but the implementations are pipelined, so checking the behaviour of single instructions would not give us sufficient confidence in the model. Thus we test the model using sequences of randomly chosen instructions.
The main challenge is to meet the constraints on the initial and intermediate execution states: we must ensure that memory accesses are in range and that we respect restrictions on the instructions. By careful transformation of these constraints an off-the-shelf SMT solver can be used to find suitable states for executing test sequences.
The model and our intended application involve precise timing information about instruction execution, but the implementations are pipelined, so checking the behaviour of single instructions would not give us sufficient confidence in the model. Thus we test the model using sequences of randomly chosen instructions.
The main challenge is to meet the constraints on the initial and intermediate execution states: we must ensure that memory accesses are in range and that we respect restrictions on the instructions. By careful transformation of these constraints an off-the-shelf SMT solver can be used to find suitable states for executing test sequences.
Original language | English |
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Title of host publication | Formal Methods for Industrial Critical Systems |
Subtitle of host publication | 19th International Conference, FMICS 2014, Florence, Italy, September 11-12, 2014. Proceedings |
Editors | Frédéric Lang, Francesco Flammini |
Publisher | Springer |
Pages | 185-199 |
Number of pages | 15 |
ISBN (Electronic) | 978-3-319-10702-8 |
ISBN (Print) | 978-3-319-10701-1 |
DOIs | |
Publication status | Published - 2014 |
Publication series
Name | Lecture Notes in Computer Science |
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Publisher | Springer |
Volume | 8718 |
ISSN (Print) | 0302-9743 |
ISSN (Electronic) | 1611-3349 |
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Dive into the research topics of 'Randomised Testing of a Microprocessor Model Using SMT-Solver State Generation'. Together they form a unique fingerprint.Projects
- 1 Finished
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REMS: Rigorous Engineering for Mainstream Systems
Stark, I. (Principal Investigator)
1/03/13 → 29/02/20
Project: Research