RECAP: Region-Aware Cache Partitioning

K. T. Sundararajan, T. M. Jones, N. P. Topham

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

In recent years, high performance computing systems have obtained more processing cores and share a last level cache (LLC). However, as their number grows, the core-to-way ratio in the LLC increases, presenting problems to existing cache partitioning techniques which require more ways than cores. Furthermore, effective energy management of the LLC becomes increasingly important due to its size. This paper proposes a Region Aware Cache Partitioning (RECAP), an LLC energy-saving scheme for high-performance, many-core processors. RECAP partitions the data within the cache into shared and private regions. Applications only access the ways containing the data that they require, realising dynamic energy savings. Any ways that are not within the shared or private regions can be turned off to save static energy. We evaluate our scheme using an 8-core CMP running multi-programmed workloads and show that it achieves 17% dynamic and 13% static energy savings in the shared LLC with a 15% performance gain. Across our multi-threaded applications, we achieve 17% dynamic and 41% static energy savings with no impact on performance.
Original languageEnglish
Title of host publicationComputer Design (ICCD), 2013 IEEE 31st International Conference on
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages294-301
Number of pages8
DOIs
Publication statusPublished - Oct 2013

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