Abstract
Modern in-memory services rely on large distributed object stores to achieve the high scalability essential to service thousands of requests concurrently. The independent and unpredictable nature of incoming requests results in random
accesses to the object store, triggering frequent remote memory accesses. State-of-the-art distributed memory frameworks leverage the one-sided operations offered by RDMA technology to mitigate the traditionally high cost of remote memory access. Unfortunately, the limited semantics of RDMA onesided
operations bound remote memory access atomicity to a single cache block; therefore, atomic remote object access relies on software mechanisms. Emerging highly integrated rackscale systems that reduce the latency of one-sided operations to a small multiple of DRAM latency expose the overhead of these software mechanisms as a major latency contributor.
This technology-triggered paradigm shift calls for new onesided operations with stronger semantics. We take a step in that direction by proposing SABRes, a new one-sided operation that provides atomic remote object reads in hardware. We
then present LightSABRes, a lightweight hardware accelerator for SABRes that removes all atomicity-associated software overheads. Compared to a state-of-the-art software atomicity mechanism, LightSABRes improve the throughput of a
microbenchmark atomically accessing 128B-8KB objects from remote memory by 15-97%, and the throughput of a modern in-memory distributed object store by 30-60%.
accesses to the object store, triggering frequent remote memory accesses. State-of-the-art distributed memory frameworks leverage the one-sided operations offered by RDMA technology to mitigate the traditionally high cost of remote memory access. Unfortunately, the limited semantics of RDMA onesided
operations bound remote memory access atomicity to a single cache block; therefore, atomic remote object access relies on software mechanisms. Emerging highly integrated rackscale systems that reduce the latency of one-sided operations to a small multiple of DRAM latency expose the overhead of these software mechanisms as a major latency contributor.
This technology-triggered paradigm shift calls for new onesided operations with stronger semantics. We take a step in that direction by proposing SABRes, a new one-sided operation that provides atomic remote object reads in hardware. We
then present LightSABRes, a lightweight hardware accelerator for SABRes that removes all atomicity-associated software overheads. Compared to a state-of-the-art software atomicity mechanism, LightSABRes improve the throughput of a
microbenchmark atomically accessing 128B-8KB objects from remote memory by 15-97%, and the throughput of a modern in-memory distributed object store by 30-60%.
| Original language | English |
|---|---|
| Title of host publication | In Proceedings of the 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2016) |
| Place of Publication | Taipei, Taiwan |
| Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
| Number of pages | 13 |
| ISBN (Electronic) | 978-1-5090-3508-3 |
| ISBN (Print) | 978-1-5090-3509-0 |
| DOIs | |
| Publication status | Published - 15 Dec 2016 |
| Event | 49th Annual IEEE/ACM International Symposium on Microarchitecture - Taipei, Taiwan, Province of China Duration: 15 Oct 2016 → 19 Oct 2016 https://www.microarch.org/micro49/ |
Conference
| Conference | 49th Annual IEEE/ACM International Symposium on Microarchitecture |
|---|---|
| Abbreviated title | MICRO-49 |
| Country/Territory | Taiwan, Province of China |
| City | Taipei |
| Period | 15/10/16 → 19/10/16 |
| Internet address |