Abstract
Architectures which incorporate a number of tightly-coupled processors often seem a natural choice for the computer designer in search of very high performance. For some applications SIMD vector or array processors are just not suitable, and a number of distinct instruction streams are required. However, multiprocessor architectures all face the fundamental problem of data sharing and process synchronisation, problems which can be illustrated by an analogy drawn from the experience of human organisation.
Original language | English |
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Title of host publication | Architecture of High Performance Computers Volume II |
Subtitle of host publication | Array processors and multiprocessor systems |
Place of Publication | New York, NY |
Publisher | Springer New York |
Pages | 109-140 |
Number of pages | 32 |
ISBN (Electronic) | 978-1-4899-6701-5 |
ISBN (Print) | 978-1-4899-6703-9 |
DOIs | |
Publication status | Published - 1989 |