Abstract
3D rigid image registration is a pivotal procedure in computer vision that aligns a floating volume with a reference one to correct positional and rotational distortions. It serves either as a stand-alone process or as a pre-processing step
for non-rigid registration, where the rigid part dominates the computational cost. Various hardware accelerators have been proposed to optimize its compute-intensive components: geometric transformation with interpolation and similarity metric computation. However, existing solutions fail to address both components effectively, as GPUs excel at image transformation, while FPGAs in similarity metric computation. To close this gap, we propose TRILLI, a novel Versal-based accelerator for image transformation and interpolation. TRILLI optimally maps each computational step on the proper heterogeneous hardware component. TRILLI achieves speedup of 5.32× against the top performing GPU-based solution, and an energy efficiency improvement of 36.75× against the most efficient one. Moreover, we integrate it with an FPGA-based similarity metric from literature to complete a rigid image registration step (i.e., transformation, interpolation, and similarity metric) attaining a speedup of 18.60× against the top performing GPU-based solution, while
for non-rigid registration, where the rigid part dominates the computational cost. Various hardware accelerators have been proposed to optimize its compute-intensive components: geometric transformation with interpolation and similarity metric computation. However, existing solutions fail to address both components effectively, as GPUs excel at image transformation, while FPGAs in similarity metric computation. To close this gap, we propose TRILLI, a novel Versal-based accelerator for image transformation and interpolation. TRILLI optimally maps each computational step on the proper heterogeneous hardware component. TRILLI achieves speedup of 5.32× against the top performing GPU-based solution, and an energy efficiency improvement of 36.75× against the most efficient one. Moreover, we integrate it with an FPGA-based similarity metric from literature to complete a rigid image registration step (i.e., transformation, interpolation, and similarity metric) attaining a speedup of 18.60× against the top performing GPU-based solution, while
Original language | English |
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Title of host publication | Proceedings of the 33rd IEEE International Symposium on Field-Programmable Custom Computing Machines |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 1-10 |
Number of pages | 10 |
Publication status | Accepted/In press - 10 Mar 2025 |
Event | The 33rd IEEE International Symposium on Field-Programmable Custom Computing Machines - Conference Hotel, Fayetteville, United States Duration: 4 May 2025 → 7 May 2025 Conference number: 33 https://www.fccm.org/ |
Publication series
Name | Proceedings of the Annual IEEE Symposium on Field-Programmable Custom Computing Machines |
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Publisher | Institute of Electrical and Electronics Engineers (IEEE) |
ISSN (Print) | 2576-2613 |
ISSN (Electronic) | 2576-2621 |
Symposium
Symposium | The 33rd IEEE International Symposium on Field-Programmable Custom Computing Machines |
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Abbreviated title | FCCM 2025 |
Country/Territory | United States |
City | Fayetteville |
Period | 4/05/25 → 7/05/25 |
Internet address |
Keywords / Materials (for Non-textual outputs)
- Versal
- image registration
- AI engine
- FPGA
- acceleration
- bilinear interpolation
- heterogeneous architecture