Speculative Dynamic Vectorization for HW/SW Co-designed Processors

Rakesh Kumar; Alejandro Martínez; Antonio González

doi:10.1145/2370816.2370895

Speculative Dynamic Vectorization for HW/SW Co-designed Processors

Rakesh Kumar, Alejandro Martínez, Antonio González

School of Informatics

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Hardware/Software (HW/SW) co-designed processors have emerged as a promising solution to the power and complexity problems of modern microprocessors. These processors utilize dynamic optimizations to improve the performance. However, vectorization, one of the most potent optimizations, has not yet received the deserved attention. This paper presents a speculative dynamic vectorization algorithm to explore its potential.

Original language	English
Title of host publication	Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques
Place of Publication	New York, NY, USA
Publisher	ACM
Pages	459-460
Number of pages	2
ISBN (Print)	978-1-4503-1182-3
DOIs	https://doi.org/10.1145/2370816.2370895
Publication status	Published - 2012

Keywords

hw/sw co-designed processor, speculation, vectorization

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10.1145/2370816.2370895

PACT2012-1Accepted author manuscript, 78.2 KB

http://dl.acm.org/citation.cfm?id=2370895

Cite this

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title = "Speculative Dynamic Vectorization for HW/SW Co-designed Processors",

abstract = "Hardware/Software (HW/SW) co-designed processors have emerged as a promising solution to the power and complexity problems of modern microprocessors. These processors utilize dynamic optimizations to improve the performance. However, vectorization, one of the most potent optimizations, has not yet received the deserved attention. This paper presents a speculative dynamic vectorization algorithm to explore its potential.",

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AU - Kumar, Rakesh

AU - Martínez, Alejandro

AU - González, Antonio

PY - 2012

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N2 - Hardware/Software (HW/SW) co-designed processors have emerged as a promising solution to the power and complexity problems of modern microprocessors. These processors utilize dynamic optimizations to improve the performance. However, vectorization, one of the most potent optimizations, has not yet received the deserved attention. This paper presents a speculative dynamic vectorization algorithm to explore its potential.

AB - Hardware/Software (HW/SW) co-designed processors have emerged as a promising solution to the power and complexity problems of modern microprocessors. These processors utilize dynamic optimizations to improve the performance. However, vectorization, one of the most potent optimizations, has not yet received the deserved attention. This paper presents a speculative dynamic vectorization algorithm to explore its potential.

KW - hw/sw co-designed processor, speculation, vectorization

U2 - 10.1145/2370816.2370895

DO - 10.1145/2370816.2370895

M3 - Conference contribution

SN - 978-1-4503-1182-3

SP - 459

EP - 460

BT - Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques

PB - ACM

CY - New York, NY, USA

ER -

Speculative Dynamic Vectorization for HW/SW Co-designed Processors

Abstract

Keywords

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