Abstract / Description of output
This paper presents a new operation chaining reconfigurable scheduling algorithm (CRS) based on list scheduling that maximizes instruction level parallelism available in distributed high performance instruction cell based reconfigurable systems. Unlike other typical scheduling methods, it considers the placement and routing effect, register assignment and advanced operation chaining compilation technique to generate higher performance scheduled code. The effectiveness of this approach is demonstrated here using a recently developed industrial distributed reconfigurable instruction cell based architecture [11]. The results show that schedules using this approach achieve equivalent throughput to VLIW architectures but at much lower power consumption.
Original language | English |
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Title of host publication | 2006 DESIGN AUTOMATION AND TEST IN EUROPE, VOLS 1-3, PROCEEDINGS |
Place of Publication | NEW YORK |
Publisher | Institute of Electrical and Electronics Engineers |
Pages | 379-384 |
Number of pages | 6 |
ISBN (Print) | 978-3-9810801-1-7 |
Publication status | Published - 2006 |
Event | Design, Automation and Test in Europe Conference and Exhibition (DATE 06) - Munich Duration: 6 Mar 2006 → 10 Mar 2006 |
Conference
Conference | Design, Automation and Test in Europe Conference and Exhibition (DATE 06) |
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City | Munich |
Period | 6/03/06 → 10/03/06 |