Test Structures for Nano-Gap Fabrication Process Development for Nano-Electromechanical Systems

Stewart Smith, Yudai Takeshiro, Yuki Okamoto, Jonathan Terry, Anthony Walton, Rimon Ikeno, Kunihiro Asada, Yoshio Mita

Research output: Contribution to conferencePaperpeer-review

Abstract

Nanometre scale pores, gaps or trenches are of significant interest for a number of applications in nano and microsystems, including biosensors, nanofluidic devices and mechanical resonators. This paper presents the design of two test
structure chips for the development of a process capable of the fabrication of controllable nanoscale trenches or gaps. This process uses uses standard microfabrication technologies, without the need for nano-scale lithography. Initial results from the first test chip have suggested design rules for pattern density and feature size for the process, which relies on chemical mechanical planarisation of polysilicon. These results have been used to inform the design of a second test chip which includes mechanical and electrical test structures. Initial results show that HF etch rate of a nanoscale silicon oxide used as a sacrificial layer can be very high, even for the very high aspect ratio features in this process.
Original languageEnglish
Pages197 - 202
Number of pages6
Publication statusPublished - 28 Mar 2017
EventInternational Conference on Microelectronic Test Structures - Grenoble, France
Duration: 28 Mar 201730 Mar 2017

Conference

ConferenceInternational Conference on Microelectronic Test Structures
Abbreviated titleICMTS
Country/TerritoryFrance
CityGrenoble
Period28/03/1730/03/17

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