Test structures to characterize a novel circuit fabrication technique that uses offset lithography

A. J. Walton; J. T.M. Stevenson; M. Fallon; P. S.A. Evans; B. J. Ramsey; D. Harrison

Test structures to characterize a novel circuit fabrication technique that uses offset lithography

A. J. Walton^*
, J. T.M. Stevenson
, M. Fallon
, P. S.A. Evans
, B. J. Ramsey
, D. Harrison

^*Corresponding author for this work

School of Engineering

Research output: Contribution to conference › Paper › peer-review

Abstract

This paper reports on the use of microelectronic test structures to characterize a novel fabrication technique for thin-film electronic circuit boards. In this technology circuit tracks are formed on paper-like substrates by depositing films of a metal-loaded ink via a standard lithographic printing process. Sheet resistance and linewidth are electrically evaluated and these compared with optical and surface profiling measurements.

Original language	English
Pages	39-44
Number of pages	6
Publication status	Published - 1 Jan 1998
Event	Proceedings of the 1998 IEEE International Conference on Microelectronic Test Structures - Kanazawa, Jpn Duration: 23 Mar 1998 → 26 Mar 1998

Conference

Conference	Proceedings of the 1998 IEEE International Conference on Microelectronic Test Structures
City	Kanazawa, Jpn
Period	23/03/98 → 26/03/98

Cite this

@conference{dcd8a8258bfc4b6f937cec153ec99a9e,

title = "Test structures to characterize a novel circuit fabrication technique that uses offset lithography",

abstract = "This paper reports on the use of microelectronic test structures to characterize a novel fabrication technique for thin-film electronic circuit boards. In this technology circuit tracks are formed on paper-like substrates by depositing films of a metal-loaded ink via a standard lithographic printing process. Sheet resistance and linewidth are electrically evaluated and these compared with optical and surface profiling measurements.",

author = "Walton, \{A. J.\} and Stevenson, \{J. T.M.\} and M. Fallon and Evans, \{P. S.A.\} and Ramsey, \{B. J.\} and D. Harrison",

year = "1998",

month = jan,

day = "1",

language = "English",

pages = "39--44",

note = "Proceedings of the 1998 IEEE International Conference on Microelectronic Test Structures ; Conference date: 23-03-1998 Through 26-03-1998",

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TY - CONF

T1 - Test structures to characterize a novel circuit fabrication technique that uses offset lithography

AU - Walton, A. J.

AU - Stevenson, J. T.M.

AU - Fallon, M.

AU - Evans, P. S.A.

AU - Ramsey, B. J.

AU - Harrison, D.

PY - 1998/1/1

Y1 - 1998/1/1

N2 - This paper reports on the use of microelectronic test structures to characterize a novel fabrication technique for thin-film electronic circuit boards. In this technology circuit tracks are formed on paper-like substrates by depositing films of a metal-loaded ink via a standard lithographic printing process. Sheet resistance and linewidth are electrically evaluated and these compared with optical and surface profiling measurements.

AB - This paper reports on the use of microelectronic test structures to characterize a novel fabrication technique for thin-film electronic circuit boards. In this technology circuit tracks are formed on paper-like substrates by depositing films of a metal-loaded ink via a standard lithographic printing process. Sheet resistance and linewidth are electrically evaluated and these compared with optical and surface profiling measurements.

UR - https://www.scopus.com/pages/publications/0031639075

M3 - Paper

AN - SCOPUS:0031639075

SP - 39

EP - 44

T2 - Proceedings of the 1998 IEEE International Conference on Microelectronic Test Structures

Y2 - 23 March 1998 through 26 March 1998

ER -

Test structures to characterize a novel circuit fabrication technique that uses offset lithography

Abstract

Conference

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