Theoretical and practical aspects of verification of quantum computers

Yehuda Naveh; E. Kashefi; James R. Wootton; Koen Bertels

doi:10.23919/DATE.2018.8342103

Theoretical and practical aspects of verification of quantum computers

Yehuda Naveh, E. Kashefi, James R. Wootton, Koen Bertels

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution

Abstract

Quantum computing is emerging at a meteoric pace from a pure academic field to a fully industrial framework. Rapid advances are happening both in the physical realisations of quantum chips, and in their potential software applications. In contrast, we are not seeing that rapid growth in the design and verification methodologies for scaled-up quantum machines. In this work we describe the field of verification of quantum computers. We discuss the underlying concepts of this field, its theoretical and practical challenges, and state-of-the-art approaches to addressing those challenges. The goal of this paper is to help facilitate early efforts to adapt and create verification methodologies for quantum computers and systems. Without such early efforts, a debilitating gap may form between the state-of-the-art of low level physical technologies for quantum computers, and our ability to build medium, large, and very large scale integrated quantum circuits (M/L/VLSIQ).

Original language	English
Title of host publication	2018 Design, Automation Test in Europe Conference Exhibition (DATE)
Publisher	Institute of Electrical and Electronics Engineers
Pages	721-730
Number of pages	10
ISBN (Electronic)	978-3-9819263-0-9
DOIs	https://doi.org/10.23919/DATE.2018.8342103
Publication status	Published - 23 Apr 2018
Event	21st Design, Automation and Test in Europe - Dresden, Germany Duration: 19 Mar 2018 → 23 Mar 2018 https://www.date-conference.com/

Publication series

Name
Publisher	IEEE
ISSN (Electronic)	1558-110

Conference

Conference	21st Design, Automation and Test in Europe
Abbreviated title	DATE 2018
Country/Territory	Germany
City	Dresden
Period	19/03/18 → 23/03/18
Internet address	https://www.date-conference.com/

Keywords / Materials (for Non-textual outputs)

Computers
Design methodology
Error correction
Logic gates
Quantum computing
Quantum entanglement
VLSIQ
design automation
verification
very large scale integrated quantum circuits

Access to Document

10.23919/DATE.2018.8342103

https://ieeexplore.ieee.org/abstract/document/8342103/

Cite this

@inproceedings{5bb31700f8b8423a9952f8f733966aff,

title = "Theoretical and practical aspects of verification of quantum computers",

abstract = "Quantum computing is emerging at a meteoric pace from a pure academic field to a fully industrial framework. Rapid advances are happening both in the physical realisations of quantum chips, and in their potential software applications. In contrast, we are not seeing that rapid growth in the design and verification methodologies for scaled-up quantum machines. In this work we describe the field of verification of quantum computers. We discuss the underlying concepts of this field, its theoretical and practical challenges, and state-of-the-art approaches to addressing those challenges. The goal of this paper is to help facilitate early efforts to adapt and create verification methodologies for quantum computers and systems. Without such early efforts, a debilitating gap may form between the state-of-the-art of low level physical technologies for quantum computers, and our ability to build medium, large, and very large scale integrated quantum circuits (M/L/VLSIQ).",

keywords = "Computers, Design methodology, Error correction, Logic gates, Quantum computing, Quantum entanglement, VLSIQ, design automation, verification, very large scale integrated quantum circuits",

author = "Yehuda Naveh and E. Kashefi and Wootton, {James R.} and Koen Bertels",

year = "2018",

month = apr,

day = "23",

doi = "10.23919/DATE.2018.8342103",

language = "English",

publisher = "Institute of Electrical and Electronics Engineers",

pages = "721--730",

booktitle = "2018 Design, Automation Test in Europe Conference Exhibition (DATE)",

address = "United States",

note = "21st Design, Automation and Test in Europe , DATE 2018 ; Conference date: 19-03-2018 Through 23-03-2018",

url = "https://www.date-conference.com/",

}

Naveh, Y, Kashefi, E, Wootton, JR & Bertels, K 2018, Theoretical and practical aspects of verification of quantum computers. in 2018 Design, Automation Test in Europe Conference Exhibition (DATE). Institute of Electrical and Electronics Engineers, pp. 721-730, 21st Design, Automation and Test in Europe , Dresden, Germany, 19/03/18. https://doi.org/10.23919/DATE.2018.8342103

TY - GEN

T1 - Theoretical and practical aspects of verification of quantum computers

AU - Naveh, Yehuda

AU - Kashefi, E.

AU - Wootton, James R.

AU - Bertels, Koen

PY - 2018/4/23

Y1 - 2018/4/23

N2 - Quantum computing is emerging at a meteoric pace from a pure academic field to a fully industrial framework. Rapid advances are happening both in the physical realisations of quantum chips, and in their potential software applications. In contrast, we are not seeing that rapid growth in the design and verification methodologies for scaled-up quantum machines. In this work we describe the field of verification of quantum computers. We discuss the underlying concepts of this field, its theoretical and practical challenges, and state-of-the-art approaches to addressing those challenges. The goal of this paper is to help facilitate early efforts to adapt and create verification methodologies for quantum computers and systems. Without such early efforts, a debilitating gap may form between the state-of-the-art of low level physical technologies for quantum computers, and our ability to build medium, large, and very large scale integrated quantum circuits (M/L/VLSIQ).

AB - Quantum computing is emerging at a meteoric pace from a pure academic field to a fully industrial framework. Rapid advances are happening both in the physical realisations of quantum chips, and in their potential software applications. In contrast, we are not seeing that rapid growth in the design and verification methodologies for scaled-up quantum machines. In this work we describe the field of verification of quantum computers. We discuss the underlying concepts of this field, its theoretical and practical challenges, and state-of-the-art approaches to addressing those challenges. The goal of this paper is to help facilitate early efforts to adapt and create verification methodologies for quantum computers and systems. Without such early efforts, a debilitating gap may form between the state-of-the-art of low level physical technologies for quantum computers, and our ability to build medium, large, and very large scale integrated quantum circuits (M/L/VLSIQ).

KW - Computers

KW - Design methodology

KW - Error correction

KW - Logic gates

KW - Quantum computing

KW - Quantum entanglement

KW - VLSIQ

KW - design automation

KW - verification

KW - very large scale integrated quantum circuits

U2 - 10.23919/DATE.2018.8342103

DO - 10.23919/DATE.2018.8342103

M3 - Conference contribution

SP - 721

EP - 730

BT - 2018 Design, Automation Test in Europe Conference Exhibition (DATE)

PB - Institute of Electrical and Electronics Engineers

T2 - 21st Design, Automation and Test in Europe

Y2 - 19 March 2018 through 23 March 2018

ER -

Theoretical and practical aspects of verification of quantum computers

Abstract

Publication series

Conference

Keywords / Materials (for Non-textual outputs)

Access to Document

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Cite this