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The operation of planar CMOS single-photon avalanche diodes (SPADs) is studied with the use of transient technology-computer-aided-design simulations calibrated with measured results. The SPAD's transient I-V curve is reported and is found to have negative differential resistance behavior that is unlike steady state. The quenching process is discussed with reference to power supply decoupling. It is found that minority carriers involved in SPAD breakdown play an important role in device performance and provide insight into a trapless after-pulsing mechanism. The influence of the parasitic bipolar transistor present in planar SPADs is analyzed. The bipolar is found to be responsible for a SPAD latch-up failure mechanism and potentially additional after pulsing. Design methods and bias possibilities for mitigating the influence of the parasitic bipolar are discussed.
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