Using value locality to reduce memory encryption overhead in embedded processors

G. Keramidas, P. Petoumenos, A. Antonopoulos, S. Kaxiras, D. N. Serpanos

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract

Memory encryption has gained much attention lately as a way to offer a secure environment to fight against software and hardware attacks. Many researchers provided memory encryption schemes whereby one or more levels of the memory hierarchy were encrypted using a cryptographic algorithm such as AES. Counter mode (CM) encryption, also called one-time-pad (OTP) encryption, is proven to be quite effective for main memory encryption. However, CM encryption requires an extra sequence number (counter) to be associated with every memory location (L2 block cacheline granularity is used). The per-block counters must be updated every time a block is written back to memory otherwise known-plaintext attacks may occur. Thus, the size of those counters is a critical parameter in the system design. In this work, we propose the use of silent stores as a method of providing the CM encryption with less overhead. Silent stores, i.e. stores, to memory that write the same value as already stored in that memory location, have been observed to occur frequently. These stores create redundant memory write-backs (and counter updates), so eliminating them will lower performance overheads introduced by the encyption/decryption process. Our initial results show significant benefits across the board indicating the promising nature of the proposed idea.
Original languageEnglish
Title of host publicationEmerging Technologies and Factory Automation, 2007. ETFA. IEEE Conference on
PublisherInstitute of Electrical and Electronics Engineers (IEEE)
Pages632-637
Number of pages6
ISBN (Print)978-1-4244-0825-2
DOIs
Publication statusPublished - Sep 2007

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