Virtual Address Translation via Learned Page Table Indexes

Artemiy Margaritov, Dmitrii Ustiugov, Edouard Bugnion, Boris Grot

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Abstract / Description of output

Address translation is an established performance bottleneck [4] in workloads operating on large datasets due to frequent TLB misses and subsequent page table walks that often require multiple memory accesses to resolve. Inspired by recent research at Google on Learned Index Structures [14], we propose to accelerate address translation by introducing a new translation mechanism based on learned models using neural networks. We argue that existing software-based learned models are unable to outperform the traditional address translation mechanisms due to their high inference time, pointing toward the need for hardware-accelerated learned models. With a challenging goal to microarchitect a hardware-friendly learned page table index, we discuss a number of machine learning and systems trade-offs, and suggest future directions.
Original languageEnglish
Title of host publicationProceedings of the Workshop on ML for Systems at NeurIPS co-located with the 32nd Conference on Neural Information Processing Systems (NIPS 2018)
Place of PublicationMontréal, Canada
Number of pages6
Publication statusE-pub ahead of print - 8 Dec 2018
EventWorkshop on ML for Systems at NeurIPS - Montreal, Canada
Duration: 8 Dec 20188 Dec 2018
http://mlforsystems.org/

Conference

ConferenceWorkshop on ML for Systems at NeurIPS
Abbreviated titleNIPS 2018
Country/TerritoryCanada
CityMontreal
Period8/12/188/12/18
Internet address

Fingerprint

Dive into the research topics of 'Virtual Address Translation via Learned Page Table Indexes'. Together they form a unique fingerprint.

Cite this