Abstract
There is a growing consensus that heterogeneous multicores are the future of CPUs. These processors would be composed of cores that are specifically adapted or tuned to particular types of applications and use cases, thereby increasing performance. The move from homogeneous to heterogeneous multicores causes the design space to explode, however. An architect of a heterogeneous processor must make design decisions per processor core rather than once for the entire processor as before. Currently, there are no methods for handling this design complexity to yield a processor that performs well for real workloads. As a step forward, we propose weak heterogeneity. A weakly heterogeneous processor is one whose cores are different, but not significantly so. The cores share an ISA and major microarchitectural features, differing only in minor details. Limiting the design space in this way allows us to explore the heterogeneous space without becoming overwhelmed by its size. We show preliminary results suggesting that a design space so constrained still has interesting trade-offs among performance, power consumption, and area.
Original language | English |
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Title of host publication | ADAPT '13 Proceedings of the 3rd International Workshop on Adaptive Self-Tuning Computing Systems |
Place of Publication | New York, NY, USA |
Publisher | ACM |
Number of pages | 3 |
ISBN (Print) | 978-1-4503-2022-1 |
DOIs | |
Publication status | Published - Jan 2013 |
Keywords / Materials (for Non-textual outputs)
- asymmetric processing, heterogeneous chip multiprocessor, heterogeneous design space exploration, power modeling