Edinburgh Research Explorer

Nigel Topham

Chair of Computer Systems

  1. 2020
  2. Fast and Correct Load-Link/Store-Conditional Instruction Handling in DBT Systems

    Kristien, M., Spink, T., Campbell, B., Sarkar, S., Stark, I., Franke, B., Boehm, I. & Topham, N., 1 Nov 2020, In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 39, 11, p. 3544 - 3554 11 p.

    Research output: Contribution to journalArticlepeer-review

  3. 2019
  4. Mitigating JIT Compilation Latency in Virtual Execution Environments

    Kristien, M., Spink, T., Wagstaff, H., Franke, B., Boehm, I. & Topham, N., 14 Apr 2019, Proceedings of the 15th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments. Association for Computing Machinery (ACM), p. 101-107 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  5. Poise: Balancing Thread-Level Parallelism and Memory System Performance in GPUs using Machine Learning

    Dublish, S., Nagarajan, V. & Topham, N., 28 Mar 2019, 2019 IEEE International Symposium on High Performance Computer Architecture (HPCA). Washington, DC, USA: Institute of Electrical and Electronics Engineers (IEEE), p. 492-505 14 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  6. 2018
  7. High Speed Cycle-Approximate Simulation of Embedded Cache-Incoherent and Coherent Chip-Multiprocessors

    Thompson, C., Gould, M. & Topham, N., 1 Dec 2018, In: International journal of parallel programming. 46, 6, p. 1247–1282 36 p.

    Research output: Contribution to journalArticlepeer-review

  8. 2017
  9. Evaluating and Mitigating Bandwidth Bottlenecks Across the Memory Hierarchy in GPUs

    Dublish, S., Nagarajan, V. & Topham, N., 13 Jul 2017, 2017 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS). Institute of Electrical and Electronics Engineers (IEEE), p. 239-248 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  10. 2016
  11. Cooperative Caching for GPUs

    Dublish, S., Nagarajan, V. & Topham, N., 1 Dec 2016, In: ACM Transactions on Architecture and Code Optimization. 13, 4, p. 1-25 25 p., 39.

    Research output: Contribution to journalArticlepeer-review

  12. Characterizing memory bottlenecks in GPGPU workloads

    Dublish, S., Nagarajan, V. & Topham, N., 10 Oct 2016, 2016 IEEE International Symposium on Workload Characterization (IISWC). Providence, RI, USA: Institute of Electrical and Electronics Engineers (IEEE), p. 1-2 2 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  13. 2015
  14. Introducing SLAMBench, a performance and accuracy benchmarking methodology for SLAM

    Nardi, L., Bodin, B., Zia, M. Z., Mawer, J., Nisbet, A., Kelly, P. H. J., Davison, A. J., Luján, M., O'Boyle, M. F. P., Riley, G., Topham, N. & Furber, S., 2 Jul 2015, 2015 IEEE International Conference on Robotics and Automation (ICRA). Seattle, WA, USA: Institute of Electrical and Electronics Engineers (IEEE), p. 5783-5790 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  15. Efficient Dual-ISA Support in a Retargetable, Asynchronous Dynamic Binary Translator

    Spink, T., Wagstaff, H., Franke, B. & Topham, N., 2015, Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS), 2015 International Conference on. Institute of Electrical and Electronics Engineers (IEEE), p. 103 - 112 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  16. 2014
  17. Efficient Code Generation in a Region-based Dynamic Binary Translator

    Spink, T., Wagstaff, H., Franke, B. & Topham, N., 2014, Proceedings of the 2014 SIGPLAN/SIGBED Conference on Languages, Compilers and Tools for Embedded Systems. New York, NY, USA: ACM, p. 3-12 10 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  18. 2013
  19. RECAP: Region-Aware Cache Partitioning

    Sundararajan, K. T., Jones, T. M. & Topham, N. P., Oct 2013, Computer Design (ICCD), 2013 IEEE 31st International Conference on. Institute of Electrical and Electronics Engineers (IEEE), p. 294-301 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  20. High speed cycle approximate simulation for cache-incoherent MPSoCs

    Gould, M., Thompson, C. & Topham, N., Jul 2013, Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII), 2013 International Conference on. Institute of Electrical and Electronics Engineers (IEEE), p. 88 - 95

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  21. A Parallel Dynamic Binary Translator for Efficient Multi-Core Simulation

    Almer, O., Boehm, I., von Koch, T. E., Franke, B., Kyle, S., Seeker, V., Thompson, C. & Topham, N., Apr 2013, In: International journal of parallel programming. 41, 2, p. 212-235 24 p.

    Research output: Contribution to journalArticlepeer-review

  22. The Smart Cache: An Energy-Efficient Cache Architecture Through Dynamic Adaptation

    Sundararajan, K. T., Jones, T. M. & Topham, N. P., Apr 2013, In: International journal of parallel programming. 41, 2, p. 305-330 26 p.

    Research output: Contribution to journalArticlepeer-review

  23. Early partial evaluation in a JIT-compiled, retargetable instruction set simulator generated from a high-level architecture description

    Gould, M., Wagstaff, H., Franke, B. & Topham, N., 2013, Publishing Proceedings of the 50th Annual Design Automation Conference - DAC 2013. ACM, 21

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  24. 2012
  25. Cooperative partitioning: Energy-efficient cache partitioning for high-performance CMPs

    Sundararajan, K. T., Porpodas, V., Jones, T. M., Topham, N. P. & Franke, B., 1 Feb 2012, High Performance Computer Architecture (HPCA), 2012 IEEE 18th International Symposium on. Institute of Electrical and Electronics Engineers (IEEE), p. 1-12 12 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  26. Design Space Exploration of Hybrid Ultra Low Power Branch Predictors

    Bielby, M., Gould, M. & Topham, N., 2012, Architecture of Computing Systems – ARCS 2012: 25th International Conference, Munich, Germany, February 28 - March 2, 2012. Proceedings. SpringerLink, Vol. 7179. p. 184-199 (Lecture Notes in Computer Science; vol. 7179).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  27. Efficiently Parallelizing Instruction Set Simulation of Embedded Multi-core Processors Using Region-based Just-in-time Dynamic Binary Translation

    Kyle, S., Böhm, I., Franke, B., Leather, H. & Topham, N., 2012, Proceedings of the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Systems. New York, NY, USA: ACM, p. 21-30 10 p. (LCTES '12).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  28. Energy-efficient Cache Partitioning for Future CMPs

    Sundararajan, K. T., Jones, T. M. & Topham, N. P., 2012, Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques. New York, NY, USA: ACM, p. 465-466 2 p. (PACT '12).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  29. Predicting best design trade-offs: a case study in processor customization

    Zuluaga, M., Bonilla, E. & Topham, N., 2012, Proceedings of the Conference on Design, Automation and Test in Europe. San Jose, CA, USA: EDA Consortium, p. 1030-1035 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

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