Edinburgh Research Explorer

Nigel Topham

Chair of Computer Systems

  1. 2013
  2. RECAP: Region-Aware Cache Partitioning

    Sundararajan, K. T., Jones, T. M. & Topham, N. P., Oct 2013, Computer Design (ICCD), 2013 IEEE 31st International Conference on. Institute of Electrical and Electronics Engineers (IEEE), p. 294-301 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  3. High speed cycle approximate simulation for cache-incoherent MPSoCs

    Gould, M., Thompson, C. & Topham, N., Jul 2013, Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XIII), 2013 International Conference on. Institute of Electrical and Electronics Engineers (IEEE), p. 88 - 95

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  4. A Parallel Dynamic Binary Translator for Efficient Multi-Core Simulation

    Almer, O., Boehm, I., von Koch, T. E., Franke, B., Kyle, S., Seeker, V., Thompson, C. & Topham, N., Apr 2013, In: International journal of parallel programming. 41, 2, p. 212-235 24 p.

    Research output: Contribution to journalArticlepeer-review

  5. The Smart Cache: An Energy-Efficient Cache Architecture Through Dynamic Adaptation

    Sundararajan, K. T., Jones, T. M. & Topham, N. P., Apr 2013, In: International journal of parallel programming. 41, 2, p. 305-330 26 p.

    Research output: Contribution to journalArticlepeer-review

  6. Early partial evaluation in a JIT-compiled, retargetable instruction set simulator generated from a high-level architecture description

    Gould, M., Wagstaff, H., Franke, B. & Topham, N., 2013, Publishing Proceedings of the 50th Annual Design Automation Conference - DAC 2013. ACM, 21

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  7. 2012
  8. Cooperative partitioning: Energy-efficient cache partitioning for high-performance CMPs

    Sundararajan, K. T., Porpodas, V., Jones, T. M., Topham, N. P. & Franke, B., 1 Feb 2012, High Performance Computer Architecture (HPCA), 2012 IEEE 18th International Symposium on. Institute of Electrical and Electronics Engineers (IEEE), p. 1-12 12 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  9. Design Space Exploration of Hybrid Ultra Low Power Branch Predictors

    Bielby, M., Gould, M. & Topham, N., 2012, Architecture of Computing Systems – ARCS 2012: 25th International Conference, Munich, Germany, February 28 - March 2, 2012. Proceedings. SpringerLink, Vol. 7179. p. 184-199 (Lecture Notes in Computer Science; vol. 7179).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  10. Efficiently Parallelizing Instruction Set Simulation of Embedded Multi-core Processors Using Region-based Just-in-time Dynamic Binary Translation

    Kyle, S., Böhm, I., Franke, B., Leather, H. & Topham, N., 2012, Proceedings of the 13th ACM SIGPLAN/SIGBED International Conference on Languages, Compilers, Tools and Theory for Embedded Systems. New York, NY, USA: ACM, p. 21-30 10 p. (LCTES '12).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  11. Energy-efficient Cache Partitioning for Future CMPs

    Sundararajan, K. T., Jones, T. M. & Topham, N. P., 2012, Proceedings of the 21st International Conference on Parallel Architectures and Compilation Techniques. New York, NY, USA: ACM, p. 465-466 2 p. (PACT '12).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  12. Predicting best design trade-offs: a case study in processor customization

    Zuluaga, M., Bonilla, E. & Topham, N., 2012, Proceedings of the Conference on Design, Automation and Test in Europe. San Jose, CA, USA: EDA Consortium, p. 1030-1035 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

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