Edinburgh Research Explorer

Nigel Topham

Chair of Computer Systems

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  1. 2006

  2. Processor Adapted to Receive Different Instruction Sets

    Topham, N., 2006, Patent No. US patent no. 7,130,989

    Research output: Patent

  3. Processor and method for generating and storing compressed instructions in a program memory and decompressed instructions in an instruction cache wherein the decompressed instructions are assigned imaginary addresses derived from information stored in the program memory with the compressed instructions

    Topham, N., 2006, Patent No. US patent no. 7,124,279

    Research output: Patent

  4. Stall Control

    Topham, N., 2006, Patent No. US patent no. 6,993,641

    Research output: Patent

  5. 2005

  6. Barrel shifter for a microprocessor

    Wong, K. L. & Topham, N., 1 Dec 2005, Patent No. US 20050289323 A1

    Research output: Patent

  7. Systems and methods for performing branch prediction in a variable length instruction set microprocessor

    Wong, K. L., Hakewill, J., Topham, N. & Fuhler, R., 1 Dec 2005, Patent No. US 20050278517 A1

    Research output: Patent

  8. Early resolving instructions

    Joyce, N. & Topham, N., 1 Feb 2005, Patent No. US 20050033941 A1

    Research output: Patent

  9. Predicated Execution of Instructions in Processors

    Topham, N., 2005, Patent No. US patent no. 6,944,853

    Research output: Patent

  10. 2004

  11. Mapping circuitry and method comprising first and second candidate output value producing units, an in-range value determining unit, and an output value selection unit

    Topham, N., 2004, Patent No. US patent no. 6,754,806

    Research output: Patent

  12. Register File Circuitry

    Topham, N., 2004, Patent No. US patent no. 6,732,251

    Research output: Patent

  13. Renaming Registers to Values Produced by Instructions According to Assigned Produce Sequence Number

    Topham, N., 2004, Patent No. US patent no. 6,826,677

    Research output: Patent

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