Edinburgh Research Explorer

Nigel Topham

Chair of Computer Systems

  1. Message-passing Multiprocessors

    Ibbett, R. N. & Topham, N. P., 1989, Architecture of High Performance Computers Volume II: Array processors and multiprocessor systems. New York, NY: Springer New York, p. 141-167 27 p.

    Research output: Chapter in Book/Report/Conference proceedingChapter

  2. The CRAY Series

    Ibbett, R. N. & Topham, N. P., 1989, Architecture of High Performance Computers: Volume I Uniprocessors and vector processors. New York, NY: Springer New York, p. 113-139 27 p.

    Research output: Chapter in Book/Report/Conference proceedingChapter

  3. MU6V: A Parallel Vector Processing System

    Ibbett, R. N., Capon, P. C. & Topham, N. P., 1985, Proceedings of the 12th Annual International Symposium on Computer Architecture. Los Alamitos, CA, USA: Institute of Electrical and Electronics Engineers (IEEE), p. 136-144 9 p. (ISCA '85).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  4. The Effect of Restricted Instruction Issue Width on an Access Decoupled Architecture

    Jones, G. P. & Topham, N. P., 1997, Parallel Computing: Fundamentals, Applications and New Directions, Proceedings of the Conference ParCo'97, 19-22 September 1997, Bonn, Germany.. p. 665-672 8 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  5. A comparison of data prefetching on an access decoupled and superscalar machine

    Jones, G. P. & Topham, N. P., 1 Dec 1997, Microarchitecture, 1997. Proceedings., Thirtieth Annual IEEE/ACM International Symposium on. p. 65-70 6 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  6. A limitation study into access decoupling

    Jones, G. P. & Topham, N. P., 1997, Euro-Par'97 Parallel Processing: Third International Euro-Par Conference Passau, Germany, August 26–29, 1997 Proceedings. Lengauer, C., Griebl, M. & Gorlatch, S. (eds.). Springer Berlin Heidelberg, p. 1102-1111 10 p. (Lecture Notes in Computer Science; vol. 1300).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  7. High Speed CPU Simulation using LTU Dynamic Binary Translation

    Jones, D. & Topham, N. P., 2009, 4th International Conference on High Performance Embedded Architectures and Compilers (HiPEAC). Springer Berlin Heidelberg, p. 50-64 15 p. (Lecture Notes in Computer Science).

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

  8. Early resolving instructions

    Joyce, N. & Topham, N., 1 Feb 2005, Patent No. US 20050033941 A1

    Research output: Patent

  9. Fast and Correct Load-Link/Store-Conditional Instruction Handling in DBT Systems

    Kristien, M., Spink, T., Campbell, B., Sarkar, S., Stark, I., Franke, B., Boehm, I. & Topham, N., 1 Nov 2020, In: IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems. 39, 11, p. 3544 - 3554 11 p.

    Research output: Contribution to journalArticlepeer-review

  10. Mitigating JIT Compilation Latency in Virtual Execution Environments

    Kristien, M., Spink, T., Wagstaff, H., Franke, B., Boehm, I. & Topham, N., 14 Apr 2019, Proceedings of the 15th ACM SIGPLAN/SIGOPS International Conference on Virtual Execution Environments. Association for Computing Machinery (ACM), p. 101-107 7 p.

    Research output: Chapter in Book/Report/Conference proceedingConference contribution

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