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A Reconfigurable 3-D-Stacked SPAD Imager With In-Pixel Histogramming for Flash LIDAR or High-Speed Time-of-Flight Imaging

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Original languageEnglish
Pages (from-to)2947-2956
Number of pages10
JournalIEEE Journal of Solid-State Circuits
Issue number11
Early online date27 Sep 2019
Publication statusE-pub ahead of print - 27 Sep 2019


A 256 × 256 single-photon avalanche diode (SPAD)
sensor integrated into a 3-D-stacked 90-nm 1P4M/40-nm 1P8M
process is reported for flash light detection and ranging
(LIDAR) or high-speed direct time-of-flight (ToF) 3-D imaging.
The sensor bottom tier is composed of a 64 × 64 matrix of
36.72-μm pitch modular photon processing units which operate
from shared 4 × 4 SPADs at 9.18-μm pitch and 51% fill-factor.
A 16 × 14 bit counter array integrates photon counts or events
to compress data to 31.4 Mb/s at 30-frame/s readout over 8 I/O
operating at 100 MHz. The pixel-parallel multi-event time-todigital
converter (TDC) approach employs a programmable
internal or external clock for 0.56–560-ns time bin resolution.
In conjunction with a per-pixel correlator, the power is reduced to
less than 100 mW in practical daylight ranging scenarios. Examples
of ranging and high-speed 3-D ToF applications are given.

    Research areas

  • Photonics, imaging, Spatial resolution, Clocks, correlators, 3-D imaging, CMOS, direct time of flight (dToF), histogramming, image sensor, light detection and ranging (LIDAR), single-photon avalanche diodes (SPADs), time-to-digital converter (TDC), TDC sharing architecture, Time of flight (TOF)

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