Edinburgh Research Explorer

An Architecture for High Performance Computing and Data Systems using Byte-Addressable Persistent Memory

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Original languageEnglish
Title of host publicationHigh Performance Computing
Subtitle of host publicationISC High Performance 2019
EditorsM Weiland , G Juckeland, S Alam , H Jagode
PublisherSpringer
Pages258-274
Number of pages19
ISBN (Electronic)978-3-030-34356-9
ISBN (Print)978-3-030-34355-2
DOIs
Publication statusE-pub ahead of print - 3 Dec 2019
EventISC High Performance 2019 - Frankfurt, Germany
Duration: 16 Jun 201920 Jun 2019
https://www.isc-hpc.com/research-papers-2019.html

Publication series

NameLecture Notes in Computer Science
PublisherSpringer Verlag
ISSN (Print)0302-9743

Conference

ConferenceISC High Performance 2019
Abbreviated titleISC HPC 2019
CountryGermany
CityFrankfurt
Period16/06/1920/06/19
Internet address

Abstract

Non-volatile and byte-addressable memory technology with performance close to main memory has the potential to revolutionise computing systems in the near future. Such memory technology provides the potential for extremely large memory regions (i.e. > 3TB per server), very high performance I/O, and new ways of storing and sharing data for applications and workflows. This paper proposes hardware and system software architectures that have been designed to exploit such memory for High Performance Computing and High Performance Data Analytics systems, along with descriptions of how applications could benet from such hardware, and initial performance results on a system with Intel Optane DC Persistent Memory.

    Research areas

  • Non-volatile memory, persistent memory, system architecture, systemware, NVRAM, B-APM

Event

ISC High Performance 2019

16/06/1920/06/19

Frankfurt, Germany

Event: Conference

Download statistics

No data available

ID: 104519939