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Exploring the acceleration of the Met Office NERC Cloud model using FPGAs

Research output: Chapter in Book/Report/Conference proceedingConference contribution

Original languageEnglish
Title of host publicationHigh Performance Computing
Subtitle of host publicationISC High Performance 2019
EditorsWeiland Michele, Juckeland Guido, Alam Sadaf, Jagode Heike
Number of pages20
ISBN (Electronic)978-3-030-34356-9
ISBN (Print)978-3-030-34355-2
Publication statusE-pub ahead of print - 3 Dec 2019
EventISC19 IXPUG Workshop: Using FPGAs to Accelerate HPC & Data Analytics on Intel-Based Systems - Frankfurt, Germany
Duration: 20 Jun 201920 Jun 2019

Publication series

NameLecture Notes in Computer Science
PublisherSpringer, Cham
ISSN (Electronic)0302-9743


WorkshopISC19 IXPUG Workshop: Using FPGAs to Accelerate HPC & Data Analytics on Intel-Based Systems
Abbreviated titleISC19 IXPUG


The use of Field Programmable Gate Arrays (FPGAs) to accelerate computational kernels has the potential to be great benefit to scientific codes and the HPC community in general. With the recent developments in FPGA programming technology, the ability to port kernels is becoming far more accessible. However, to gain reasonable performance from this technology it is not enough to simple transfer a code onto the FPGA, instead the algorithm must be rethought and recast in a data-flow style to suit the target architecture. In this paper we describe the porting, via HLS, of one of the most computationally intensive kernels of the Met Office NERC Cloud model (MONC), an atmospheric model used by climate and weather researchers, onto an FPGA. We describe in detail the steps taken to adapt the algorithm to make it suitable for the architecture and the impact this has on kernel performance. Using a PCIe mounted FPGA with on-board DRAM, we consider the integration on this kernel within a larger infrastructure and explore the performance characteristics of our approach in contrast to Intel CPUs that are popular in modern HPC machines, over problem sizes involving very large grids. The result of this work is an experience report detailing the challenges faced and lessons learnt in porting this complex computational kernel to FPGAs, as well as exploring the role that FPGAs can play and their fundamental limits in accelerating traditional HPC workloads.

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