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It's all about data movement: Optimising FPGA data access to boost performance

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Original languageEnglish
Number of pages10
Publication statusE-pub ahead of print - 17 Nov 2019
EventFifth International Workshop on
Heterogeneous High-performance Reconfigurable Computing
- Denver, United States
Duration: 17 Nov 201917 Nov 2019
https://h2rc.cse.sc.edu/

Workshop

WorkshopFifth International Workshop on
Heterogeneous High-performance Reconfigurable Computing
Abbreviated titleH2RC19
CountryUnited States
CityDenver
Period17/11/1917/11/19
Internet address

Abstract

The use of reconfigurable computing, and FPGAs in particular, to accelerate computational kernels has the potential to be of great benefit to scientific codes and the HPC community in general. However, whilst recent advanced in FPGA tooling have made the physical act of programming reconfigurable architectures much more accessible, in order to gain good performance the entire algorithm must be rethought and recast in a dataflow style. Reducing the cost of data movement for all computing devices is critically important, and in this paper we explore the most appropriate techniques for FPGAs. We do this by exploring the optimisations of an existing FPGA implementation of an atmospheric model's advection scheme. Taking an FPGA code that was over four times slower than running on the CPU, mainly due to data movement overhead, we describe the profiling and optimisation strategies adopted to significantly reduce the runtime and bring the performance of our FPGA kernels to a much more practical level for real-world use. The result of this work is a set of techniques, steps, and lessons learnt that we have found significantly improve the performance of FPGA based HPC codes and that others can adopt in their own codes to achieve similar improvements.

    Research areas

  • Reconfigurable computing, FPGAs, HLS, MONC

Event

ID: 115088043