Edinburgh Research Explorer

Mapping application performance to HPC architecture

Research output: Contribution to journalArticle

  • Alan Gray
  • Iain Bethune
  • Richard Kenway
  • Lorna Smith
  • Christine Kitchen
  • Martin Guest
  • Paul Calleja
  • Aleksander Korzynski
  • Stuart Rankin
  • Mike Ashworth
  • Andrew Porter
  • Illian Todorov
  • Martin Plummer
  • Emma Jones
  • Lois Steenman-Clark
  • Ben Ralston
  • Charles Laughton

Related Edinburgh Organisations

Original languageEnglish
Pages (from-to)520-529
Number of pages10
JournalComputer Physics Communications
Issue number3
Early online date15 Nov 2011
Publication statusPublished - Mar 2012


A suite of application benchmarks, designed to be broadly representative of UK HPC usage, has been developed to stress a broad range of architectural features of large scale parallel HPC resources. A generic methodology to investigate application performance and scaling characteristics has been defined, resulting in a detailed understanding of the performance of these applications. This methodology is transferable to other applications and systems: it is of practical value to developers and users who are aiming for optimal utilisation of HPC resources. An understanding of the performance characteristics of a range of large-scale HPC resources has been obtained using low-level synthetic benchmarks. A relatively simple, qualitative mechanism to assess and predict application performance on current and future architectures using synthetic benchmark results together with application performance analysis results is explored.

    Research areas

  • Performance analysis, Benchmarking, High performance computing

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