Research output: Contribution to journal › Article › peer-review
Rights statement: Copyright © 2009 IOP Publishing Ltd. All rights reserved.
Accepted author manuscript, 899 KB, PDF document
Original language | English |
---|---|
Article number | 485203 |
Number of pages | 6 |
Journal | Nanotechnology |
Volume | 20 |
Issue number | 48 |
DOIs | |
Publication status | Published - 2 Dec 2009 |
The feasibility of using carbon nanotube (CNT) bundles as the fillers of through silicon vias (TSVs) has been demonstrated. CNT bundles are synthesized directly inside TSVs by thermal chemical vapor deposition (TCVD). The growth of CNTs in vias is found to be highly dependent on the geometric dimensions and arrangement patterns of the vias at atmospheric pressure. The CNT-Si structure is planarized by a combined lapping and polishing process to achieve both a high removal rate and a fine surface finish. Electrical tests of the CNT TSVs have been performed and their electrical resistance was found to be in the few hundred ohms range. The reasons for the high electrical resistance have been discussed and possible methods to decrease the electrical resistance have been proposed.
ID: 1508103